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StrongARM core components

The StrongARM components are responsible for control tasks, including initialization, loading and control of microengines, memory mapping of SDRAM to the host, initialization of different memory buffers, etc. It is also responsible for signalling across the PCI bus. For instance, in a `slow-readers preference' implementation, the StrongARM receives the `advance read pointer' messages from the host.

Herbert Bos 2004-10-06